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Physics-Based Compact Modeling for the Drain Current Variability in Single-Layer Graphene FETs

T0 review · 1 major / 1 minor · reviewed 2026-08-07 · deepseek-v4-flash

Pith's one-line read A physics-based compact model reproduces the measured drain-current variability of monolayer graphene transistors across all bias regions.

desk verdict A useful compact-model contribution whose 'physics-based' claim outruns its evidence because D is a free knob; deserves peer review with requests for out-of-sample validation. read the letter →

arxiv 2506.03732 v1 pith:DRPUKTPR submitted 2025-06-04 cond-mat.mes-hall physics.comp-ph

classification cond-mat.mes-hallphysics.comp-ph
keywords graphenefield-effecttransistordraincurrentvariabilitycompactmodelcarriernumberfluctuationCoulombscatteringchargedimpurities1/fnoisesolution-gatedGFET
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper claims that the drain-current variability of monolayer graphene transistors can be described by a physics-based compact model that integrates local fluctuations along the channel. The central idea is that charged impurities induce local deviations in both the transport charge and the Coulomb-scattering-limited mobility, and these local current fluctuations add incoherently from source to drain. The model reproduces the measured variance of the drain current, including its M-shaped bias dependence, for three differently sized solution-gated GFETs across strong p-type to strong n-type operation. A separate series-resistance term accounts for the variance contribution at high carrier densities. If the model is right, circuit designers can predict worst-case and typical device behavior quickly, without Monte Carlo simulation.

What carries the argument

The load-bearing mechanism is the split-channel representation: the transistor is divided into two fluctuation-free transistors separated by a microscopic slice $\Delta x$ whose local current fluctuation $\delta I_x$ is modeled by a parallel current source. Small-signal analysis gives $\delta I_d = (\Delta x/L)\,\delta I_x$, so each slice contributes to $\mathrm{Var}[I_D]/I_D^2$ proportionally to $(\delta I_x/I_D)^2$. The local relative fluctuation contains two terms: a carrier-number-fluctuation term $\delta Q_{\mathrm{gr}}/Q_{\mathrm{gr}}$ and a correlated Coulomb-scattering mobility term $\alpha_C\mu_{\mathrm{ueff}}\,\delta Q_{\mathrm{imp}}$. Assuming uncorrelated slices with $\mathrm{Var}(Q_{\mathrm{imp}})=e^2N'_{\mathrm{imp}}/(W\Delta x)$ and changing the integration variable to the chemical potential $V_c$ turns the sum into the compact integrals of eqs. 11--17. The effective impurity density $N'_{\mathrm{imp}}=D N_{\mathrm{imp}}$ (with $D$ between $10^3$ and $10^6$ for these solution-gated devices) absorbs the departure from Poisson statistics.

What would settle it

Compare GFETs with the same channel area but different width-to-length ratios: eq. 9 predicts a specific $1/W$ prefactor, so a violation of that scaling would show that the uncorrelated-slice assumption is wrong. Independently, compare the extracted $N'_{\mathrm{imp}}$ values with impurity densities from Hall or capacitance measurements to test whether the $D$ factor is disguising additional physics.

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Extended reading notes

Core claim

The paper's central claim is that the total variance of the drain current in a monolayer GFET is given by $\mathrm{Var}[I_D]/I_D^2 = \mathrm{Var}[I_D]/I_D^2|_{\delta Q_{\mathrm{gr}},\delta\beta} + \mathrm{Var}[I_D]/I_D^2|_{\delta R_C}$ (eq. 19). The channel term comes from slicing the device into infinitesimal uncorrelated sections and integrating the local response of the transport charge $Q_{\mathrm{gr}}$ and the effective mobility $\mu_{\mathrm{ueff}}$ to charged-impurity fluctuations, producing eq. 9 and its closed-form evaluation in eqs. 11--17. The series-resistance term is eq. 18, adapted from CMOS mismatch modeling, and it matters mainly at strong p- or n-type bias where contact effects are largest. The model is validated against measured standard deviations of $I_D$ for GFETs with $W/L = 100/100$, $50/50$, and $20/20$ $\mu$m/$\mu$m from strong p-type to strong n-type bias, and it reproduces the M-shaped $\mathrm{Var}[I_D]/I_D^2$ versus gate voltage, with a minimum at the charge neutrality point and maxima where the relative fluctuation of $Q_{\mathrm{gr}}$ is largest.

Load-bearing premise

The model's variance integral assumes that charged-impurity fluctuations in different channel slices are statistically independent and that their variance is $e^2N'_{\mathrm{imp}}/(W\Delta x)$; if spatial correlations exist, or if the adjustable factor $D$ is absorbing physics it does not describe, the integrated prediction in eq. 9 loses its physical grounding.

Editorial extensions

If this is right

  • Because eq. 19 is implemented in Verilog-A, a circuit simulator can compute $\pm 3\sigma$ worst-case transfer curves from the same parameters that fit the mean current, making tolerance-aware design practical.
  • The model separates channel-induced variance from series-resistance variance, so measured curves can be decomposed to tell which part of the device dominates variability in each bias region.
  • Since the same physical mechanisms drive both $1/f$ noise and drain-current variance, the two types of measurements can be used as cross-checks when extracting impurity-related parameters.
  • The extracted parameters quantify how much of the variability comes from the graphene/electrolyte interface rather than from geometry, which is useful for comparing fabrication processes.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The same local-fluctuation integration should apply to other 2D-material FETs (for example MoS$_2$) after replacing the graphene charge--voltage relation, as long as the slice-uncorrelated assumption holds.
  • The very large $D$ values ($10^3$--$10^6$) reported for solution-gated devices suggest the 'effective impurity density' may also be absorbing dynamic screening or correlated disorder; a direct impurity-variance measurement would test this.
  • The paper leaves the short-channel regime open: at strong $V_{DS}$, velocity-saturation effects on mobility fluctuations would introduce additional $V_{DS}$-dependent terms in eq. 19.
  • If the M-shape is driven by relative charge fluctuations, then reducing charged-impurity disorder (for example by encapsulation) should flatten the variance curve and shift the maxima to stronger doping; this is a testable prediction.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

1 major / 1 minor

Summary. The paper proposes a compact model for the drain-current variance of single-layer graphene field-effect transistors (GFETs), building on the authors' earlier Vc-based static compact model. The device channel is divided into uncorrelated slices, and local fluctuations of the graphene charge Qgr (carrier number fluctuations) and of the effective mobility through Coulomb scattering (correlated mobility fluctuations) are integrated from source to drain, yielding closed-form integrals (Eqs. 11-17). A series-resistance variance term (Eq. 18) is added, and the total variance is validated against measured ID statistics of three sizes of solution-gated GFETs (100x100, 50x50, 20x20 um^2) across p- and n-type bias regimes. The model reproduces the measured variance and the ±3σ worst-case ID curves well. The central claim is that this is the first physics-based compact model that precisely describes ID fluctuations in monolayer GFETs.

Significance. If the model is genuinely predictive, it would be a useful tool for circuit designers and for technology assessment, since it connects bias-dependent ID variability to physical mechanisms (charged impurities, Coulomb scattering, series resistance) already used in 1/f noise models. The work includes several concrete strengths: the derivation follows a standard local-fluctuation methodology from CMOS/organic FET literature; the integrals are provided in closed form; the model is implemented in Verilog-A and demonstrated in a SPICE-like environment; and the validation covers multiple geometries and both ambipolar branches. These features make the paper a potentially valuable contribution to compact modeling of 2D-material devices. However, the significance is currently limited by the lack of out-of-sample validation and by the fact that several key parameters are fitted to the same variance data that the model claims to reproduce, particularly N'imp, which is admitted to be scaled by an adjustable factor D over three decades.

major comments (1)
  1. [Appendix (b), Eq. 9, and Section II] The derivation of Eq. 9 assumes that local charged-impurity fluctuations in different slices are uncorrelated, and that Var(Qimp) = e^2 * N'imp / (W*Δx). The manuscript itself notes that in the solution-gated devices used here, Nimp no longer follows a Poisson distribution and that D is introduced to account for this. If spatial correlations exist, or if D is absorbing other physics (such as non-Poisson statistics or long-range impurity ordering), the integrated variance expression in Eq. 9 would not be valid, and the extracted N'imp values would lose their physical meaning as impurity densities. The manuscript should state the validity limits of the uncorrelated-slice assumption and provide direct evidence (e.g., from the data itself) that the assumption is reasonable for these devices, rather than only fitting the outcome.
minor comments (1)
  1. [Fig. 3] The legend for the dashed curves in Fig. 3 is described in the caption as 'Charged impurities Qimp (magenda)' but the spelling should be 'magenta', and it would be clearer to use the same terminology as in the text ('channel contribution' vs 'series resistance contribution').

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the bias-dependent variance form is derived from established local-fluctuation physics and standard compact-model integrals; the fitted parameters are openly used for calibration, not relabeled as predictions.

full rationale

The paper's derivation chain is self-contained. Equations (1)-(8) combine the authors' previously published GFET compact-model electrostatics with standard carrier-number and correlated-mobility fluctuation expressions taken from the established MOSFET/organic-FET mismatch literature [23,25,28], and equations (9)-(17) are exact integral manipulations of those expressions. Equation (18) adapts a standard series-resistance mismatch formula, and equation (19) is the sum of the channel and access-resistance contributions. The model parameters N'imp, alphaC, and VarRc are explicitly introduced as model parameters and are extracted from the measured variance curves (Table I); the subsequent agreement with the measured sigma[ID] curves is an in-sample consistency check, not a claim that these parameters were predicted a priori. No fitted parameter is renamed as a prediction, no uniqueness theorem is invoked, and no target quantity is defined in terms of itself. The self-citations to the authors' prior IV compact model [37]-[40] and GFET noise study [10] are references to previously published and independently benchmarked results; the range of D in [10] is an empirical observation, not an unverified assertion imported to force the present conclusion. The large spread of fitted N'imp across nominally similar geometries is a legitimate concern about physical interpretation and possible overfitting, but it is a correctness risk rather than evidence that the derivation reduces to its inputs by construction.

Assumptions & free parameters 6 free parameters · 4 assumptions · 0 invented entities

The variance model has six free parameters fitted to the variance data (N'imp and alphaC and VarRc for p and n type). The IV parameters (mobility, VG0, usat, Delta, Theta_int, Rc) are inherited from the core model and fitted to the mean ID, but they also influence the variance prediction. The D factor is a hidden free knob inside N'imp, with a range of three decades, which weakens the physical constraint. No new physical entities are introduced.

free parameters (6)
  • N'imp_p (p-type effective impurity density) = 100x100: 1.47e15 cm^-2; 50x50: 610e15 cm^-2; 20x20: 220e15 cm^-2 (values in units of 10^15 cm^-2)
    Sets the magnitude of the channel variance in p-type regime; extracted from the measured variance data for each device size.
  • N'imp_n (n-type effective impurity density) = 100x100: 12.3e15 cm^-2; 50x50: 210e15 cm^-2; 20x20: 25e15 cm^-2 (values in units of 10^15 cm^-2)
    Sets the magnitude of the channel variance in n-type regime; extracted from the measured variance data for each device size.
  • alphaC_p (p-type Coulomb scattering coefficient) = 100x100: 15 kV s/C; 50x50: 0.1 kV s/C; 20x20: -0.315 kV s/C
    Controls the mobility-fluctuation contribution in p-type regime; extracted from the variance data, with negative value allowed for one device.
  • alphaC_n (n-type Coulomb scattering coefficient) = 100x100: 6 kV s/C; 50x50: 1.1 kV s/C; 20x20: 1.05 kV s/C
    Controls the mobility-fluctuation contribution in n-type regime; extracted from the variance data.
  • VarRc_p (p-type series resistance variance) = 100x100: 6000 ohm^2; 50x50: 6500 ohm^2; 20x20: 7000 ohm^2
    Scales the series-resistance variance contribution at high carrier densities in p-type; extracted from the variance data.
  • VarRc_n (n-type series resistance variance) = 100x100: 1 ohm^2; 50x50: 4000 ohm^2; 20x20: 3000 ohm^2
    Scales the series-resistance variance contribution at high carrier densities in n-type; extracted from the variance data.
assumptions (4)
  • domain assumption Local current fluctuations from different channel slices are uncorrelated.
    Used to sum variances in eq. 9 after eq. A1; if correlations exist, the simple integration is invalid. Stated after eq. 9.
  • ad hoc to paper The variance of charged impurities in a slice scales as e^2 N'imp / (W dx), with N'imp = D Nimp and D between 10^3 and 10^6 for solution-gated devices.
    Introduced to match the enhanced variance in SG GFETs; D is a free multiplier that absorbs deviations from Poisson statistics. Near eq. 9.
  • domain assumption alphaC (Coulomb scattering coefficient) is independent of gate bias and carrier density in monolayer GFETs.
    Borrowed from refs [30]-[34]; if alphaC varies with carrier density, eqs. 7-9 change. Invoked before eq. 7.
  • standard math The charge relations Qgr = (k/2)(Vc^2 + alpha/k) and dQimp/dVc = k|Vc| + C hold from the Vc-based core model.
    These are definitions from the authors' earlier compact model (eqs. 3-5), used as algebraic inputs to the variance derivation.

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Cite this review

Pith. "Pith review of Physics-Based Compact Modeling for the Drain Current Variability in Single-Layer Graphene FETs." pith.science (2026). https://pith.science/paper/DRPUKTPR

@misc{pith2026250603732,
  author       = {Pith},
  title        = {Pith review of: Physics-Based Compact Modeling for the Drain Current Variability in Single-Layer Graphene FETs},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/DRPUKTPR}},
  note         = {Machine review of arXiv:2506.03732}
}
read the original abstract

For the growth of emerging graphene field-effect transistor (GFET) technologies, a thorough characterization of on-wafer variability is required. Here, we report for the first time a physics-based compact model, which precisely describes the drain current (ID) fluctuations of monolayer GFETs. Physical mechanisms known to generate 1/f noise in transistors, such as carrier number and Coulomb scattering mobility fluctuations, are also revealed to cause ID variance. Such effects are considered in the model by being activated locally in the channel and the integration of their contributions from source to drain results in total variance. The proposed model is experimentally validated from a statistical population of three different-sized solution-gated (SG) GFETs from strong p- to strong n-type bias conditions. A series resistance ID variance model is also derived mainly contributing at high carrier densities.

Figures

Figures reproduced from arXiv: 2506.03732 by the authors.

Figure 6
Figure 6. [PITH_FULL_IMAGE:figures/full_fig_p002_6.png] view at source ↗
Figure 3
Figure 3. Var[ID]/ID 2 vs. VGS (a, c, e) and drain current ID (b, d, f) for GFETs with a, b) W=100 μm and L=100 μm, c, d) W=50 μm and L=50 μm, and e, f) W=20 μm and L=20 μm. P-type region is shown in (b), (d) while both p- (upper) and n-types (bottom) in (f). Markers: measurements, solid lines: model, dashed lines: Charged impurities Qimp (magenda) and series resistance Rc (blue) contributions. region, confirming the argument… view at source ↗
Figure 4
Figure 4. a) Normalized drain current variance Var[ID]/ID 2 ] due to Qimp and b) its relative fluctuation from Coulomb scattering coefficient αC=0 to αC=0.1 (red), 0.5 (magenta) and 1 (orange) KV.s/C, respectively, vs. VGS for GFETs with W=50 μm and L=50 μm. Solid lines: model, dashed lines: mobility degradation coefficient Θint=0 V -1 . minimum value towards high ID regime. The 1st term (ΔQ/Q) of eq. 2 is mainly responsible … view at source ↗

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Pith tools

Reviewed August 7, 2026 · model on record in the stance chip above.