Paper Citation Record · LEDGER

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips

As of 20 August 2026, this Paper Citation Record lists 33 of 33 outbound references and 1 inbound Pith citation observation for arXiv:2509.05532.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2509.05532 v1

Coverage vector

measured 33 of 33 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-05T05:28:06.400750Z

measured 34 of 34 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-20T06:33:59.587034+00:00

measured 1 of 1 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-05-15T15:43:58.746925Z

measured 1 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Reference resolution

33 of 33 outbound references displayed

verified exact9
verified fuzzy18
unresolved3
parse uncertain0
malformed identifier1
metadata mismatch2

External citation measurements

0
arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Outbound references

Observation a8198f0c-fad7-427b-b1aa-e65d6fb32aa0 · outbound

This paper cites Hardware implementation of spiking neural networks on fpga,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Hardware implementation of spiking neural networks on fpga,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.254702Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 5a1a7971-dbfd-497c-856a-bc836724099c · outbound

This paper cites Optical neural networks: progress and challenges,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Optical neural networks: progress and challenges,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.245175Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 9a2c65d1-0327-44e0-b4fc-6d21ff21b362 · outbound

This paper cites Power-efficient combinatorial optimization using intrinsic noise in memristor hopfield neural networks,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Power-efficient combinatorial optimization using intrinsic noise in memristor hopfield neural networks,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.234521Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 02f6759c-25ed-42bf-86b0-40a4cb6ce121 · outbound

This paper cites Cresti,Beyond-CMOS: State of the Art and Trends, ser.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Cresti,Beyond-CMOS: State of the Art and Trends, ser

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.225328Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation bfd33dc4-63d8-483c-b336-5c405684e24e · outbound

This paper cites Spiking neuron devices consisting of single-flux-quantum circuits,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Spiking neuron devices consisting of single-flux-quantum circuits,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.215445Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 3401f6c9-6650-4af3-a49f-ad9f6b6b9f4b · outbound

This paper cites Synchronization dynamics on the picosecond time scale in coupled Josephson junction neurons,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Synchronization dynamics on the picosecond time scale in coupled Josephson junction neurons,

Reference 6

Resolution: verified exact; doi, observed 2026-08-05T05:28:06.485454Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 70f68c03-27ca-47c6-91d2-08a1325cec43 · outbound

This paper cites Josephson junction simulation of neurons,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Josephson junction simulation of neurons,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-05T05:28:06.306816Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0fb00a2e-236c-457b-8242-3391f405cb16 · outbound

This paper cites Relating superconducting optoelectronic networks to classical neurodynamics,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Relating superconducting optoelectronic networks to classical neurodynamics,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.204652Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation bbfb5e2a-bd5a-4567-9c27-5d21a4fd98ed · outbound

This paper cites Stochastic single flux quantum neuromorphic computing using magnetically tunable josephson junctions,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Stochastic single flux quantum neuromorphic computing using magnetically tunable josephson junctions,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.194132Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation f2b065b2-2b49-4aed-83bd-b0a79e067630 · outbound

This paper cites Ultralow power artificial synapses using nanotextured magnetic josephson junctions,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Ultralow power artificial synapses using nanotextured magnetic josephson junctions,

Reference 10

Resolution: verified exact; doi, observed 2026-08-05T05:28:06.468404Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 9d14429a-13c2-4020-8f38-45a9113f5cfa · outbound

This paper cites Design of a power efficient artificial neuron using superconducting nanowires,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Design of a power efficient artificial neuron using superconducting nanowires,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.184423Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 65f0dbae-b2a0-4337-ae93-91d118fbe05a · outbound

This paper cites Spiking neuron circuits using superconducting quantum phase-slip junctions,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Spiking neuron circuits using superconducting quantum phase-slip junctions,

Reference 12

Resolution: verified exact; doi, observed 2026-08-05T05:28:06.457920Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 4e113b4f-aefc-4018-942a-b7b578e78495 · outbound

This paper cites High-speed and low-power superconducting neuromorphic cir- cuits based on quantum phase-slip junctions,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips High-speed and low-power superconducting neuromorphic cir- cuits based on quantum phase-slip junctions,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.174325Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation d4cf0014-7991-4c4c-9326-e1db6e50c0ae · outbound

This paper cites Hybrid rsfq-qfp superconducting neuron,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Hybrid rsfq-qfp superconducting neuron,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.163852Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 2a9b94fc-298d-4352-9387-a06f218e3ac2 · outbound

This paper cites Harnessing stochasticity for superconductive multi-layer spike- rate-coded neuromorphic networks,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Harnessing stochasticity for superconductive multi-layer spike- rate-coded neuromorphic networks,

Reference 15

Resolution: verified exact; doi, observed 2026-08-05T05:28:06.447956Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation b3e9a808-b504-4761-b97e-7673d978e35e · outbound

This paper cites Biosfq circuit family for neuromorphic computing: Bridging digital and analog domains of superconductor technologies,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Biosfq circuit family for neuromorphic computing: Bridging digital and analog domains of superconductor technologies,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.153706Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 97275bca-f1ed-4c3f-b28d-c4930094ddd9 · outbound

This paper cites Development of a neuromorphic network using biosfq circuits,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Development of a neuromorphic network using biosfq circuits,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.141808Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation fc4a229e-b850-4396-9d3c-3869ce7b6441 · outbound

This paper cites A superconducting synapse exhibiting spike-timing dependent plasticity,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips A superconducting synapse exhibiting spike-timing dependent plasticity,

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-05T05:28:06.345551Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 92b21dcd-a270-4a8f-be78-c39dc870dee0 · outbound

This paper cites Learning dynamics on the picosecond timescale in a superconducting synapse structure,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Learning dynamics on the picosecond timescale in a superconducting synapse structure,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.132457Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 5be26cfb-526f-443a-9ae5-1b4520ad9302 · outbound

This paper cites An on-chip trainable neuron circuit for sfq-based spiking neural networks,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips An on-chip trainable neuron circuit for sfq-based spiking neural networks,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.122074Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation e88f0c6e-a3d5-40e9-bcbe-5845be961557 · outbound

This paper cites A binary neural computing unit with programmable gate using sfq and cmos hybrid circuit,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips A binary neural computing unit with programmable gate using sfq and cmos hybrid circuit,

Reference 23

Resolution: malformed identifier; no resolver link, observed 2026-08-05T05:28:06.366616Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c5367790-d59e-46f9-b7aa-e90bcbcd5ba4 · outbound

This paper cites Sushi: Ultra-high-speed and ultra-low-power neuromorphic chip using superconducting single-flux-quantum circuits,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Sushi: Ultra-high-speed and ultra-low-power neuromorphic chip using superconducting single-flux-quantum circuits,

Reference 24

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-05T05:28:07.041558Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 03cbc221-6646-4781-a9dd-452701e728ae · outbound

This paper cites Single Flux Quantum Based Ultrahigh Speed Spiking Neuromorphic Processor Architecture.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Single Flux Quantum Based Ultrahigh Speed Spiking Neuromorphic Processor Architecture

Reference 25

Resolution: verified exact; local_arxiv, observed 2026-08-05T05:28:06.868557Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 19be6a26-1943-4b21-8b3c-fdfe38d2b73c · outbound

This paper cites Scalable superconductor neuron with ternary synaptic connections for ultra-fast snn hardware,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Scalable superconductor neuron with ternary synaptic connections for ultra-fast snn hardware,

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.101768Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation e9e54459-baec-44e1-8ed9-44b203c023e2 · outbound

This paper cites Advanced fabrication processes for superconducting very large scale integrated circuits,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Advanced fabrication processes for superconducting very large scale integrated circuits,

Reference 27

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-05T05:28:06.853372Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation a29346ac-cf44-47e5-874c-6dca6dad2543 · outbound

This paper cites Multi-task learning using uncer- tainty to weigh losses for scene geometry and semantics,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Multi-task learning using uncer- tainty to weigh losses for scene geometry and semantics,

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.091586Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation c4a0fff5-bef6-4d1b-9434-ce0a92a37073 · outbound

This paper cites Available: https://dx.doi.org/10.1088/1361-6668/adaaa9.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Available: https://dx.doi.org/10.1088/1361-6668/adaaa9

Reference 29

Resolution: verified exact; doi, observed 2026-08-05T05:28:06.425174Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 53ab2ae8-c3f9-4fd4-8c24-cda4f4fe4c94 · outbound

This paper cites Rsfq logic/memory family: a new josephson-junction technology for sub-terahertz-clock-frequency digital systems,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Rsfq logic/memory family: a new josephson-junction technology for sub-terahertz-clock-frequency digital systems,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.081661Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation eaaa7192-3014-4c61-a036-14b4028255a9 · outbound

This paper cites Unsupervised learning of digit recognition using spike-timing-dependent plasticity,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Unsupervised learning of digit recognition using spike-timing-dependent plasticity,

Reference 31

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-05T05:28:06.676067Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 46de8e50-82ec-4b9c-98a8-c54eb89756fc · outbound

This paper cites Multi-Task Learning as Multi-Objective Optimization.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Multi-Task Learning as Multi-Objective Optimization

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-05T05:28:06.389470Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 791f5afc-013a-4898-94f1-17c0ac1e8e27 · outbound

This paper cites Unsupervised sfq-based spiking neural network,.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Unsupervised sfq-based spiking neural network,

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T05:28:07.111773Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 6e9504ab-488f-4dc6-a2fa-903b1862daf6 · outbound

This paper cites Relating Superconducting Optoelectronic Networks to Classical Neurodynamics.

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips Relating Superconducting Optoelectronic Networks to Classical Neurodynamics

Reference 2024

Resolution: metadata mismatch; local_arxiv, observed 2026-08-05T05:28:07.070564Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Observation 1b0c2097-dfcc-4919-adfa-266da0d83bea · outbound

This paper cites Learning dynamics on the picosecond timescale in a superconducting synapse structure.

Reference 2025

Resolution: metadata mismatch; local_arxiv, observed 2026-08-05T05:28:07.055372Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Pith citing papers

Observation 0d47b5cf-26ae-4776-91b1-6e5887c8c2ca · inbound

Programmable superconducting neuron with intrinsic in-memory computation and dual-timescale plasticity for ultra-efficient neuromorphic computing cites this paper.

Programmable superconducting neuron with intrinsic in-memory computation and dual-timescale plasticity for ultra-efficient neuromorphic computing SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips

Reference 21

Resolution: verified exact; arxiv_id, observed 2026-05-15T15:46:12.084765Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.