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arxiv: 2604.15213 · v1 · submitted 2026-04-16 · 🪐 quant-ph · cond-mat.mes-hall

Simulation of quantum annealing on a semiconducting cQED device for Multiple Hypothesis Tracking (MHT) benchmark

Quentin Schaeverbeke , Viktor Radovi\'c , Jean-Marc Divanon , Bing Hong Teh This is my paper

Pith reviewed 2026-05-10 10:31 UTC · model grok-4.3

classification 🪐 quant-ph cond-mat.mes-hall
keywords quantum annealingcQEDsemiconducting spinMultiple Hypothesis Trackingquantum emulatorradar trackingreal-time applications
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The pith

Semiconducting cQED quantum processors can achieve 50 ms run times for Multiple Hypothesis Tracking via quantum annealing.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper evaluates a semiconducting spin cQED quantum processor for solving Multiple Hypothesis Tracking problems using quantum annealing. It uses a quantum emulator that includes both dynamical coherent errors and incoherent errors to benchmark performance in two scenarios. Estimates of reset, measurement, and annealing times lead to a total run time of around 50 ms. This performance level would make the technology viable for real-time applications like radar tracking.

Core claim

From two different benchmarking scenarios we evaluate this type of quantum annealer on a quantum emulator in which we incorporated both dynamical coherent errors and incoherent errors. From estimate of the reset, measurement and annealing time of the processor, we find that cQED-spin processors could reach a total run time of around 50 ms. This makes this technology promising for potential real time application such as radar tracking.

What carries the argument

Quantum annealing procedure on a quantum emulator of a semiconducting cQED spin device that incorporates dynamical coherent and incoherent errors.

If this is right

  • The cQED-spin processor can process MHT benchmarks in two scenarios.
  • Total run time can reach around 50 ms including reset, measurement, and annealing.
  • This run time makes the technology promising for real-time radar tracking.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Hardware implementations would need to validate the error models used in the emulator to confirm the 50 ms estimate.
  • Similar performance could extend to other optimization problems beyond MHT if the annealing succeeds.
  • Real-time applications in radar could benefit if the device scales to larger problem sizes.

Load-bearing premise

The quantum emulator accurately incorporates both dynamical coherent errors and incoherent errors, and the assumed times for reset, measurement, and annealing operations match what a real semiconducting cQED device would achieve.

What would settle it

Running the same MHT benchmarks on actual semiconducting cQED hardware and measuring a total run time significantly higher than 50 ms or observing failure to find correct tracks due to unmodeled errors.

Figures

Figures reproduced from arXiv: 2604.15213 by Bing Hong Teh, Jean-Marc Divanon, Quentin Schaeverbeke, Viktor Radovi\'c.

Figure 1
Figure 1. Figure 1: Schematic of the carbon nanotube spin qubit. In [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Logitudinal, λσ, and transversal, gσ, spin-photon coupling as a function of the bias DQD energy ε. The bias energy is given in units of the tunneling energy γ, while cou￾pling energies are given in unit of the bare electron-photon coupling g0. it does not show explicitly the encoding of the informa￾tion. In the computational basis of Hq this encoding becomes more obvious and the Hamiltonian reads, H = ωq 2… view at source ↗
Figure 3
Figure 3. Figure 3: The number of hypothesis as a function of time for [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: The deviations from the ground tracks obtained using the TSM-WC classical solver (dark blue) and Callisto (light [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: The number of hypotheses as a function of time for [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
Figure 7
Figure 7. Figure 7: Tracks obtained using the Callisto annealer on each time step for the scenario with one linear track and the [PITH_FULL_IMAGE:figures/full_fig_p007_7.png] view at source ↗
Figure 8
Figure 8. Figure 8: A total operating time histogram for one full run [PITH_FULL_IMAGE:figures/full_fig_p007_8.png] view at source ↗
read the original abstract

We explore the expected performance of a semiconducting spin cQED quantum processor for Multiple Hypothesis Tracking (MHT) algorithm via a quantum annealing procedure. From two different benchmarking scenarios we evaluate this type of quantum annealer on a quantum emulator in which we incorporated both dynamical coherent errors and incoherent errors. From estimate of the reset, measurement and annealing time of the processor, we find that cQED-spin processors could reach a total run time of around 50 ms. This makes this technology promising for potential real time application such as radar tracking.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 2 minor

Summary. The paper simulates quantum annealing for Multiple Hypothesis Tracking (MHT) benchmarks using a quantum emulator of a semiconducting spin cQED device. The emulator incorporates dynamical coherent errors and incoherent errors. From separate estimates of reset, measurement, and annealing times, the authors conclude that cQED-spin processors could achieve a total run time of around 50 ms, making the technology promising for real-time applications such as radar tracking. Two benchmarking scenarios are evaluated.

Significance. If the timing assumptions are realized in hardware and the error models accurately reflect device performance, this would provide a concrete performance target showing that semiconducting cQED annealers can address practical combinatorial problems like MHT at speeds relevant to real-time tracking. The explicit inclusion of both coherent and incoherent errors in the emulator is a methodological strength that improves upon purely ideal simulations.

major comments (1)
  1. [Performance evaluation / runtime estimation section] The headline result of a ~50 ms total run time (and the associated claim of promise for real-time MHT/radar applications) is obtained by adding external estimates for reset, measurement, and annealing durations to the emulator outputs. These durations are introduced as assumptions rather than derived from the device Hamiltonian, pulse schedules, or calibrated against published experimental benchmarks on spin-cQED platforms; this assumption is load-bearing for the central performance claim.
minor comments (2)
  1. [Abstract] The abstract refers to 'two different benchmarking scenarios' and the incorporation of errors but provides no quantitative success probabilities, error rates, or timing values; a brief summary of these results should be added to the abstract for completeness.
  2. [Methods / emulator description] Notation and definitions for the coherent and incoherent error channels in the emulator should be introduced with explicit equations or parameter values in the methods section to allow reproducibility.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for their constructive feedback and for acknowledging the strengths of our error modeling. We address the major comment point by point below.

read point-by-point responses

  1. Referee: [Performance evaluation / runtime estimation section] The headline result of a ~50 ms total run time (and the associated claim of promise for real-time MHT/radar applications) is obtained by adding external estimates for reset, measurement, and annealing durations to the emulator outputs. These durations are introduced as assumptions rather than derived from the device Hamiltonian, pulse schedules, or calibrated against published experimental benchmarks on spin-cQED platforms; this assumption is load-bearing for the central performance claim.

    Authors: We agree that the ~50 ms figure combines emulator outputs for the annealing phase with separate estimates for reset and measurement times, and that these are not derived from the device Hamiltonian or pulse schedules within this work. The estimates reflect typical values from the semiconducting spin-cQED literature (e.g., microsecond-scale reset and readout times). In the revised manuscript we will expand the performance evaluation section to include explicit citations to published experimental benchmarks on spin-cQED reset and measurement durations, thereby calibrating the assumptions against hardware data. We will also note that a full first-principles derivation of all timing components lies outside the scope of the present simulation study, whose primary focus is the impact of coherent and incoherent errors on MHT solution quality. This revision will make the load-bearing assumptions traceable without altering the core emulator results or the overall conclusion. revision: partial

Circularity Check

0 steps flagged

No significant circularity detected

full rationale

The paper's central performance claim (total run time ~50 ms) is obtained by adding externally stated estimates for reset, measurement, and annealing durations to emulator outputs. No equations, derivations, or self-citations are presented that reduce this figure to a fitted parameter or prior result defined by the target claim itself. The timing values function as independent inputs rather than outputs of the simulation or self-referential constructs. The derivation chain is therefore self-contained against external benchmarks and does not exhibit any of the enumerated circularity patterns.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

Only the abstract is available, so the ledger is necessarily incomplete; the central claim rests on unstated assumptions about error modeling and device timing parameters.

axioms (2)
  • domain assumption The incorporated dynamical coherent and incoherent error models are representative of actual semiconducting cQED hardware behavior.
    Invoked when the emulator is used to evaluate performance and derive the 50 ms estimate.
  • domain assumption Reset, measurement, and annealing times can be estimated independently of the specific MHT instance and remain valid for real-time operation.
    Used to convert emulator results into the total run-time claim.

pith-pipeline@v0.9.0 · 5402 in / 1334 out tokens · 58553 ms · 2026-05-10T10:31:48.511878+00:00 · methodology

discussion (0)

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Reference graph

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