A donor-cluster array architecture in silicon uses shared electrons and natural hyperfine distributions for individual spin addressability, tunable inter-cluster exchange, and high-fidelity gates to enable scalable quantum computing.
URL https://arxiv.org/abs/2507.11918
10 Pith papers cite this work. Polarity classification is still indexing.
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Pulse-optimized implementations of single- and double-qubit excitations in VQE reduce runtimes by up to 15.3 times on silicon spin-qubit processors.
Alloy disorder in wiggle wells both randomizes and enables EDSR, with sweet spots permitting high-fidelity Rabi oscillations despite charge noise.
CAbLECAR provides a robotics-inspired shuttle scheduler that enables QLDPC codes on tileable spin-qubit hardware, yielding up to 86% faster schedules and orders-of-magnitude gains in encoding efficiency and logical error rates over surface codes.
Hole spin qubits can sense the geometry of electrostatic disorder from two-level fluctuators via g-tensor anisotropy, using a Berry-phase protocol estimated to achieve order-unity SNR in tens of microseconds, with optimal regimes identified by quantum Fisher information.
Experimental demonstration of Ge concentration modulations in Si quantum wells with periods from 2.00 nm to 0.49 nm (including at k0 and 2k0/3), characterized by X-ray and STEM showing high homogeneity and gradients up to 20 at-%/nm, with k·p simulations suggesting valley splitting enhancement in 2k
Resource estimation for magic-state distillation on silicon spin qubits finds 42% overhead reduction via optimized pulses and ~3x physical footprint reduction with biased codes versus surface code.
Raising the atomic-layer deposition temperature of Al2O3 and using HfO2 or poly-Si gates in SiMOS devices correlates with higher mobility and lower charge noise, yielding more stable quantum dots.
Simulations indicate a semiconducting cQED quantum annealer could complete MHT tasks in ~50 ms, positioning the technology as promising for real-time tracking applications.
A review summarizing spin qubit platforms, long-range coupling methods, and a proposal for topological linking toward scalable quantum information processing.
citing papers explorer
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Scalable Spin Qubit Architecture with Donor-Cluster Arrays in Silicon
A donor-cluster array architecture in silicon uses shared electrons and natural hyperfine distributions for individual spin addressability, tunable inter-cluster exchange, and high-fidelity gates to enable scalable quantum computing.
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Pulse-optimised circuit elements for scalable and noise-resilient quantum chemistry
Pulse-optimized implementations of single- and double-qubit excitations in VQE reduce runtimes by up to 15.3 times on silicon spin-qubit processors.
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High-fidelity EDSR in Si/SiGe Wiggle Wells
Alloy disorder in wiggle wells both randomizes and enables EDSR, with sweet spots permitting high-fidelity Rabi oscillations despite charge noise.
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CAbLECAR: efficiently scheduling QLDPC codes on a tileable spin qubit chip with shuttling
CAbLECAR provides a robotics-inspired shuttle scheduler that enables QLDPC codes on tileable spin-qubit hardware, yielding up to 86% faster schedules and orders-of-magnitude gains in encoding efficiency and logical error rates over surface codes.
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Probing Electrostatic Disorder via g-Tensor Geometry
Hole spin qubits can sense the geometry of electrostatic disorder from two-level fluctuators via g-tensor anisotropy, using a Berry-phase protocol estimated to achieve order-unity SNR in tens of microseconds, with optimal regimes identified by quantum Fisher information.
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Sharp periodic Ge concentration modulations beyond the conduction band valley wavevector $k_0$ in nuclear spin-free Si quantum wells
Experimental demonstration of Ge concentration modulations in Si quantum wells with periods from 2.00 nm to 0.49 nm (including at k0 and 2k0/3), characterized by X-ray and STEM showing high homogeneity and gradients up to 20 at-%/nm, with k·p simulations suggesting valley splitting enhancement in 2k
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Hardware-Tailored Resource Estimation for Magic-State Distillation on Silicon Spin Qubits
Resource estimation for magic-state distillation on silicon spin qubits finds 42% overhead reduction via optimized pulses and ~3x physical footprint reduction with biased codes versus surface code.
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Gate Stack Engineering for High-Mobility and Low-Noise SiMOS Quantum Devices
Raising the atomic-layer deposition temperature of Al2O3 and using HfO2 or poly-Si gates in SiMOS devices correlates with higher mobility and lower charge noise, yielding more stable quantum dots.
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Simulation of quantum annealing on a semiconducting cQED device for Multiple Hypothesis Tracking (MHT) benchmark
Simulations indicate a semiconducting cQED quantum annealer could complete MHT tasks in ~50 ms, positioning the technology as promising for real-time tracking applications.
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Theory of spin qubits and the path to scalability
A review summarizing spin qubit platforms, long-range coupling methods, and a proposal for topological linking toward scalable quantum information processing.