REVIEW 1 cited by
Shallow-depth GHZ state generation on NISQ devices
Not yet reviewed by Pith; the record is open.
This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.
SPECIMEN: schema-true, not a live event
T0 review · schema-true
One-sentence machine reading of the paper's core claim.
pith:XXXXXXXX · record.json · timestamp
Shallow-depth GHZ state generation on NISQ devices
read the original abstract
In this work, we focus on GHZ state generation under the practical constraint of limited qubit connectivity, a hallmark of current NISQ hardware. We study the GHZ state preparation across different connectivity graphs inspired by IBM and Google chip architectures, as well as random graphs that reflect distributed quantum systems. Our approach is a measurement-based protocol designed to utilize qubit connectivity constraints for the generation of GHZ states on NISQ devices. We benchmark this against a tailored version of state-of-the-art unitary-based protocols, also incorporating physical connectivity limitations. To evaluate the performance of the protocols under realistic conditions, we conducted implementations on the IBM Eagle r3 chip. Additionally, to explore near-term scalability, we performed simulations across a range of graph sizes and connectivity configurations, assessing performance based on circuit depth, the number of two-qubit gates, and measurement overhead. We observe a trade-off between the two protocols across different figures of merit. For current state-of-the-art NISQ architectures, the unitary-based protocol is more suitable, as it avoids mid-circuit measurements and classical feedforward. However, the measurement-based protocol is expected to become more advantageous in the future with more error-resilient quantum devices, owing to its reduced circuit depth and consequently shorter execution times. In both settings, our proposed method provides an efficient means of leveraging the topology of qubit connections available on a given device.
Forward citations
Cited by 1 Pith paper
-
Fault-Tolerant Logical Operations and Efficient State Preparation in Modular Quantum Architectures with Noisy Interfaces
Noisy modular interfaces tolerate ~10× higher error than local gates for lattice-surgery CNOTs, and distributed logical GHZ ancilla cost reduces to a spanning-tree vertex cover.
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.