Paper Citation Record · LEDGER

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL

As of 10 August 2026, this Paper Citation Record lists 28 of 28 outbound references and 0 inbound Pith citation observations for arXiv:2603.09161.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2603.09161 v2

Coverage vector

measured 28 of 28 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-03T01:22:44.961261Z

measured 28 of 28 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-10T06:31:04.303077+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

28 of 28 outbound references displayed

verified exact0
verified fuzzy0
unresolved28
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 66a81c4d-bc58-4857-856c-90de6fc31f2b · outbound

This paper cites Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:41.967148Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9daf0812-b22f-4297-9e3d-8e7ed1b45241 · outbound

This paper cites Graph similarity and its applications to hardware security.IEEE Transactions on Computers, 69(4):505–519, 2019.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Graph similarity and its applications to hardware security.IEEE Transactions on Computers, 69(4):505–519, 2019

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.048472Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a41f2736-145c-4ff9-9b1b-d4a4b5164dbe · outbound

This paper cites GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.194968Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bcd0d1f1-c61d-47a4-84c9-171d737fe422 · outbound

This paper cites Widegate: Beyond directed acyclic graph learning in subcircuit boundary prediction.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Widegate: Beyond directed acyclic graph learning in subcircuit boundary prediction

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.308665Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation db293d11-619b-4f0a-b27e-1ab469b4c26d · outbound

This paper cites Relut-gnn: Reverse engineering data path elements from lut netlists using graph neural networks.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Relut-gnn: Reverse engineering data path elements from lut netlists using graph neural networks

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.423702Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a5cc2ac6-f180-4bf4-ad92-503d5c494be6 · outbound

This paper cites an unresolved cited work.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Unresolved cited work

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.561028Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 25e9a21e-1517-4ebf-a30d-955fe8cb7045 · outbound

This paper cites Functionality matters in netlist representation learning.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Functionality matters in netlist representation learning

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.631791Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 90ae8349-c681-4f46-ba2b-ec0a512a2801 · outbound

This paper cites Gnn-re: Graph neural networks for reverse engineering of gate-level netlists.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(8):2435–2448, 2022.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Gnn-re: Graph neural networks for reverse engineering of gate-level netlists.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(8):2435–2448, 2022

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.757793Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0ff7c95f-616a-467a-b674-01e7fa8f2a40 · outbound

This paper cites Dagnn-re: Directed acyclic graph neural network for functional reverse engineering of gate-level netlist.Integration, 102:102343, 2025.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Dagnn-re: Directed acyclic graph neural network for functional reverse engineering of gate-level netlist.Integration, 102:102343, 2025

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.870412Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2a66bd2a-cd72-4ded-9d40-5094317efa5d · outbound

This paper cites Appgnn: Approximation-aware functional reverse en- gineering using graph neural networks.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Appgnn: Approximation-aware functional reverse en- gineering using graph neural networks

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:42.936407Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 80f236cc-74ca-4d1d-a8fe-d6c2e6ee67b7 · outbound

This paper cites TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.039644Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8fc43752-4168-4878-9722-0a07b861176d · outbound

This paper cites Hw2vec: A graph learning tool for automating hard- ware security.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Hw2vec: A graph learning tool for automating hard- ware security

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.199051Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ca082758-7564-47db-a411-95e83f94053f · outbound

This paper cites Hardware trojan detection using graph neural networks.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 44(1):25–38, 2022.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Hardware trojan detection using graph neural networks.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 44(1):25–38, 2022

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.337038Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 90462282-f23a-44a0-9280-9f563276e26b · outbound

This paper cites Rtlcoder: Outperforming gpt-3.5 in design rtl generation with our open-source dataset and lightweight solution.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Rtlcoder: Outperforming gpt-3.5 in design rtl generation with our open-source dataset and lightweight solution

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.397861Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c670c22c-67f3-4a5b-86cc-34fabb4207b5 · outbound

This paper cites Data is all you need: Finetuning llms for chip design via an automated design-data augmentation framework.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Data is all you need: Finetuning llms for chip design via an automated design-data augmentation framework

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.481427Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5f378b06-7708-4393-b8c0-fbcd7bf94af8 · outbound

This paper cites Rtllm: An open-source bench- mark for design rtl generation with large language model, 2023.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Rtllm: An open-source bench- mark for design rtl generation with large language model, 2023

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.571235Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 24aaf0de-88af-4dec-97a0-9b83eb5aa7ec · outbound

This paper cites Gnn4ip: Graph neural network for hardware intellectual property piracy detection.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Gnn4ip: Graph neural network for hardware intellectual property piracy detection

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.635084Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 20094e10-ed1d-4e45-8710-8a621c7a63e3 · outbound

This paper cites Hansen, H.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Hansen, H

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.772180Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4663a317-4cb7-4d16-a4f9-cb8c4bfbbd95 · outbound

This paper cites The epfl combinational benchmark suite.Hypotenuse, 256(128):214335, 2015.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL The epfl combinational benchmark suite.Hypotenuse, 256(128):214335, 2015

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.823940Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7b19cc1c-8812-4775-b745-cd06edf6fbe8 · outbound

This paper cites Deepgate2: Functionality- aware circuit representation learning.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Deepgate2: Functionality- aware circuit representation learning

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:43.933402Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 757f7e89-878d-42b7-9a58-8626e1b84ce5 · outbound

This paper cites Deepgate3: Towards scalable circuit representation learning.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Deepgate3: Towards scalable circuit representation learning

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.084577Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7dca8377-599a-4c70-acb1-903a61a7a1e4 · outbound

This paper cites Functional matching of logic subgraphs: Beyond structural isomorphism.arXiv preprint arXiv:2505.21988, 2025.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Functional matching of logic subgraphs: Beyond structural isomorphism.arXiv preprint arXiv:2505.21988, 2025

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.190055Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e719f8ba-4c8c-49b4-b353-3b28dc2733c6 · outbound

This paper cites Autosilicon: Scaling up rtl design generation capability of large language models.ACM Transactions on Design Automation of Electronic Systems, 30(6):1–21, 2025.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Autosilicon: Scaling up rtl design generation capability of large language models.ACM Transactions on Design Automation of Electronic Systems, 30(6):1–21, 2025

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.340967Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 71385824-3fed-4c01-ae25-dbd88b5f756c · outbound

This paper cites Llm voting: Human choices and ai collective decision-making.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Llm voting: Human choices and ai collective decision-making

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.474346Z

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Unavailable: canonical work link unavailable.

Observation 0930e047-6a28-41a9-8675-f7b3508ee10c · outbound

This paper cites Embodied LLM Agents Learn to Cooperate in Organized Teams.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL Embodied LLM Agents Learn to Cooperate in Organized Teams

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.572743Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 38cccb8c-10eb-4714-90f6-c26b47d1ae49 · outbound

This paper cites GraphSAINT: Graph Sampling Based Inductive Learning Method.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL GraphSAINT: Graph Sampling Based Inductive Learning Method

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.715677Z

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Unavailable: canonical work link unavailable.

Observation 4a1232f9-5fc4-4be0-a2bc-e9a18b219261 · outbound

This paper cites PicoRV32 - A Size-Optimized RISC-V CPU Core.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL PicoRV32 - A Size-Optimized RISC-V CPU Core

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.888076Z

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Unavailable: canonical work link unavailable.

Observation 7e2ddf86-e5b3-4d26-9323-e690ac5b59e0 · outbound

This paper cites NEORV32: A small, customizable and extensible mcu-class 32-bit risc-v soft-core cpu and microcontroller-like soc written in platform-independent vhdl.

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL NEORV32: A small, customizable and extensible mcu-class 32-bit risc-v soft-core cpu and microcontroller-like soc written in platform-independent vhdl

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-03T01:22:44.961261Z

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Unavailable: canonical work link unavailable.

Pith citing papers

No inbound Pith citation observations are available.