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Paper Citation Record · LEDGER

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies

As of 14 August 2026, this Paper Citation Record lists 39 of 39 outbound references and 0 inbound Pith citation observations for arXiv:2502.01449.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2502.01449 v2

Coverage vector

measured 39 of 39 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-09T15:19:46.644542Z

measured 39 of 39 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-14T06:32:32.682623+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

39 of 39 outbound references displayed

  • verified exact3
  • verified fuzzy35
  • unresolved1
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 72c704fc-6998-4c26-97a1-d44ddd1869d1 · outbound

This paper cites Bunch of Wires (BoW) PHY Specification,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Bunch of Wires (BoW) PHY Specification,

Reference 1

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raw_fallback, observed 2026-08-09T15:19:47.603629Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.460489Z digest=sha256:482871368070807c642e05633eb0604392874bd722050cf4050733003c4a07df

Observation eaee8db7-6f1b-409d-9cc5-a8b3881b819b · outbound

This paper cites Bunch of wires: An open die-to-die interface,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Bunch of wires: An open die-to-die interface,

Reference 2

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.551587Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.466167Z digest=sha256:01ce800ede89e9908be78aed5b77d67f90cf80056069c6a83b5e485d5d31b5e6

Observation 0f35701c-bf89-425d-8603-41803ddc81e9 · outbound

This paper cites Reliability evaluation of a cowos-enabled 3d ic package,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Reliability evaluation of a cowos-enabled 3d ic package,

Reference 3

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.470905Z digest=sha256:d7e23093c616c1a47dd895d189d4778191392fb27066b29bc1059766e79d620c

Observation d53f346c-9f3e-40c8-87ba-3ed1f311cea8 · outbound

This paper cites Kite: A family of heterogeneous interposer topologies enabled via accurate interconnect modeling,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Kite: A family of heterogeneous interposer topologies enabled via accurate interconnect modeling,

Reference 4

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raw_fallback, observed 2026-08-09T15:19:47.443091Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.476149Z digest=sha256:9c0528b39519861b8788af91d434571911531d1525c885275e16f3b658282e36

Observation 98a1e60e-19c0-4e5d-9e59-cda756bf4047 · outbound

This paper cites The parsec benchmark suite: Characterization and architectural implications,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies The parsec benchmark suite: Characterization and architectural implications,

Reference 5

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unresolved
no resolver link, observed 2026-08-09T15:19:46.480965Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-09T15:19:46.480965Z digest=sha256:7773fa588c862836210c7b99cd0efbd6faec3a94516f64026997a1c928312301

Observation 27789629-a261-40a6-9d8b-da3c47c752ae · outbound

This paper cites High-speed perfor- mance of silicon bridge die-to-die interconnects,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies High-speed perfor- mance of silicon bridge die-to-die interconnects,

Reference 6

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.409839Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.485876Z digest=sha256:57b69f1588078730c6565a5b502fffef665f70177f99b0645ee311f474f0772b

Observation 517ae5af-e004-4b0a-902e-b73e101a8ed9 · outbound

This paper cites Chiplet placement for 2.5 d ic with sequence pair based tree and thermal consideration,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Chiplet placement for 2.5 d ic with sequence pair based tree and thermal consideration,

Reference 7

Resolution
verified fuzzy
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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.490665Z digest=sha256:8a9e278fd86340ea5bb9f941affe281a7aaaf8fde35c5a533901eda84f297b94

Observation 729fef6a-4929-4491-8a9f-8d2e2ebdcbc7 · outbound

This paper cites Cross-layer co-optimization of network design and chiplet placement in 2.5-d systems,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Cross-layer co-optimization of network design and chiplet placement in 2.5-d systems,

Reference 8

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.357888Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.497143Z digest=sha256:04c31d29009a6a31095fa7ebe16f53c0a9983490e9b471b990cae70b14fbb6d7

Observation 7a05417d-8ff7-4fbd-a3c8-e180ba0db83f · outbound

This paper cites A cross-layer methodology for design and optimization of networks in 2.5 d systems,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies A cross-layer methodology for design and optimization of networks in 2.5 d systems,

Reference 9

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.342078Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.502087Z digest=sha256:57be83d27adc0038f0794128ebecbf95ca02b2e12fe549a3b319efda0f0ad4ed

Observation 554eea0e-8c27-4acc-951a-79e406808bbd · outbound

This paper cites Active interposer technology for chiplet- based advanced 3d system architectures,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Active interposer technology for chiplet- based advanced 3d system architectures,

Reference 10

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.326999Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.506741Z digest=sha256:329cd74d30f02346735f1ebaa27f6e41c07c4a7c2a3079ab2028b891abeb2e62

Observation 13b20059-79fb-4f39-a714-18b7f8d565b1 · outbound

This paper cites Leveraging thermally-aware chiplet organization in 2.5 d systems to reclaim dark silicon,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Leveraging thermally-aware chiplet organization in 2.5 d systems to reclaim dark silicon,

Reference 11

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.511328Z digest=sha256:a33bd57d4c940701fea87a0f3b8d4833b0f7af1070ae9484d9e233488541e2c4

Observation 82355463-8b50-4147-b422-f87059c7556c · outbound

This paper cites Dataflow- architecture co-design for 2.5 d dnn accelerators using wireless network- on-package,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Dataflow- architecture co-design for 2.5 d dnn accelerators using wireless network- on-package,

Reference 12

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.296653Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.516338Z digest=sha256:84ba49214c4bf842072d2990fa8b5a74f08a176ee7bce82d9796ee28354f6a7d

Observation dbb68428-9396-4686-98bc-ac87e4939118 · outbound

This paper cites Netraces v1.0 (A collection of network traces with dependency information).

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Netraces v1.0 (A collection of network traces with dependency information)

Reference 13

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.280823Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.521166Z digest=sha256:51d0541c7c57a7f4fe02fef93035c94eac1b83d63fd5d21edec5f7ee86534b1c

Observation ece01438-d3ba-4279-b772-18473a4a0b29 · outbound

This paper cites Netrace: dependency-driven trace-based network-on-chip simu- lation,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Netrace: dependency-driven trace-based network-on-chip simu- lation,

Reference 14

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:47.264923Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.526744Z digest=sha256:1251ace4036ad87e113d6c93782fd0104c437bb772db1eb40717c08e4cf559ff

Observation 09b82dfe-d435-431a-8e91-a7cdf810eba6 · outbound

This paper cites Netrace: Dependency-tracking traces for efficient network-on-chip experimentation,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Netrace: Dependency-tracking traces for efficient network-on-chip experimentation,

Reference 15

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.249236Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.531238Z digest=sha256:9abff6144d4fd7ff5373a8b77277c15376906f6ef019dec3283d5dac430de710

Observation 08978566-b670-4200-b718-6f01e70f65af · outbound

This paper cites Multiple chip planning for chip-interposer codesign,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Multiple chip planning for chip-interposer codesign,

Reference 16

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:47.187411Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.535871Z digest=sha256:fdc8e3d32a8492bec23f84bce32a01be0f631f678b1dcd8692c2b1d30d61bacb

Observation 9aae2024-7b38-425b-9b00-c1e325e0eb3f · outbound

This paper cites Hecaton: Training Large Language Models with Scalable Chiplet Systems.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Hecaton: Training Large Language Models with Scalable Chiplet Systems

Reference 17

Resolution
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local_arxiv, observed 2026-08-09T15:19:46.737146Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.540297Z digest=sha256:49b9e32be57f945fbf24a6afb605ca422b554e689d6237609deb7aa400390ead

Observation 8e741791-c811-40cc-b7af-55748b5e118b · outbound

This paper cites HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement

Reference 18

Resolution
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local_arxiv, observed 2026-08-09T15:19:46.714968Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.545208Z digest=sha256:530dbfa347a79ecceb234305538239b452441bca8d7a49dbb25ccae7239f73ba

Observation 2923ed87-c926-4478-8b18-4f86458f005f · outbound

This paper cites Rapidchiplet: A toolchain for rapid design space exploration of chiplet architectures,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Rapidchiplet: A toolchain for rapid design space exploration of chiplet architectures,

Reference 19

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.132084Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.550360Z digest=sha256:706f25bd183f924b694c2defefc0141664f6e3a2437f31810d0a8d16c63e6fe3

Observation 81bd0cd7-5e88-4e3a-8f42-e34e2d7922b8 · outbound

This paper cites A detailed and flexible cycle-accurate network-on-chip simulator,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies A detailed and flexible cycle-accurate network-on-chip simulator,

Reference 20

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.067143Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.555081Z digest=sha256:b040b36e256b972880ad9ff772e5b239df62520bc13de4fe0d3c3929fd5e2e29

Observation adf96a5e-1c18-4914-9964-69e9244fb8b6 · outbound

This paper cites Enabling interposer-based disintegration of multi-core processors,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Enabling interposer-based disintegration of multi-core processors,

Reference 21

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.559760Z digest=sha256:fec01dc2141f0bd233757fb6403eb378b9f605b14b05b521e45241a2da84e55a

Observation dd2cee1a-2cf8-4927-a1e5-f9c2f1272444 · outbound

This paper cites Silicon vs. organic interposer: Ppa and reliability tradeoffs in heterogeneous 2.5 d chiplet integration,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Silicon vs. organic interposer: Ppa and reliability tradeoffs in heterogeneous 2.5 d chiplet integration,

Reference 22

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.035608Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.564541Z digest=sha256:854b59c7778749dbe183ded4f3ea78d5542ff9f3c4eca54b6253d1d22a758693

Observation 7c124001-c26e-458a-8db5-ef25795d2fd4 · outbound

This paper cites CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure

Reference 23

Resolution
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local_arxiv, observed 2026-08-09T15:19:46.690595Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.569176Z digest=sha256:f213add5a0a6e1a621a2dc2edee275bf327e03976c54f51b61ab0b1a598de982

Observation b0298bc1-344f-4b04-8918-40a599be0232 · outbound

This paper cites Chiplet heterogeneous integration,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Chiplet heterogeneous integration,

Reference 24

Resolution
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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.573897Z digest=sha256:27876b55f00768465ec37aea2cbaa9248ffed0dc9913a71b2a88df68d19f91f7

Observation 99f8c111-1b20-4a3a-ab04-7196a684f9c2 · outbound

This paper cites Multi- die integration using advanced packaging technologies,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Multi- die integration using advanced packaging technologies,

Reference 25

Resolution
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raw_fallback, observed 2026-08-09T15:19:47.002817Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.578483Z digest=sha256:0f266da15d0404c3076261968a1e01e2629b961939a42e06b9aaac1bb5a66385

Observation 7b1569d0-a528-46b4-bc85-5500660bbcef · outbound

This paper cites Chiplet heteroge- neous integration technology-status and challenges,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Chiplet heteroge- neous integration technology-status and challenges,

Reference 26

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.987441Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.582865Z digest=sha256:26e1192f91bd9781044dd6d78442f4983760bf087f8660dcb0e71ee0656638a0

Observation 4fb2764e-f594-4aab-91b9-9eb19ff4786b · outbound

This paper cites Floorplanning and signal assignment for silicon interposer-based 3d ics,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Floorplanning and signal assignment for silicon interposer-based 3d ics,

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.971956Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.587676Z digest=sha256:d3a0d2966ef7d91383954e422d33341a9c2472c78fd666b86ab54a108aab5f84

Observation a1e04522-fa81-4a2f-a32e-c5a6a78244c6 · outbound

This paper cites Tap-2.5 d: A thermally-aware chiplet placement methodology for 2.5 d systems,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Tap-2.5 d: A thermally-aware chiplet placement methodology for 2.5 d systems,

Reference 28

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.956356Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.592560Z digest=sha256:d23893f85d085dc44ac70832639b211f0f08ad39b430305012e4422c6f813495

Observation 856e7b10-9736-4c79-9395-1c0196dcf603 · outbound

This paper cites Embed- ded multi-die interconnect bridge (emib)–a high density, high bandwidth packaging interconnect,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Embed- ded multi-die interconnect bridge (emib)–a high density, high bandwidth packaging interconnect,

Reference 29

Resolution
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raw_fallback, observed 2026-08-09T15:19:46.941066Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.597298Z digest=sha256:3df59213db73d25ce60f8d8760f38cf2201c12cd2cdf03e876f9ae35e785f073

Observation ddd9472f-5a15-4e78-a4e1-b58d5af1265a · outbound

This paper cites The saga of minimum spanning trees,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies The saga of minimum spanning trees,

Reference 30

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.924785Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.602173Z digest=sha256:63791ec2efce024e361eb797856b0365adfdf3c4c0898cb70c80bf602c7b5fa1

Observation 48d61992-df04-4e9d-bfa6-900eb34dc139 · outbound

This paper cites Pioneering chiplet technology and design for the amd epyc™ and ryzen™ processor families: Industrial product,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Pioneering chiplet technology and design for the amd epyc™ and ryzen™ processor families: Industrial product,

Reference 31

Resolution
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raw_fallback, observed 2026-08-09T15:19:46.908871Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.606923Z digest=sha256:472431fbcf0ea1e7cc54a7e4628f54701e3d8af6745a57ca83628c11a8010b46

Observation a2b10bbc-c5b2-4360-8d45-7984d27e5c68 · outbound

This paper cites Optimal die placement for interposer-based 3d ics,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Optimal die placement for interposer-based 3d ics,

Reference 32

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.887209Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.611674Z digest=sha256:0e6da0fcb2e4914eb0d2c82ce913a360121c292a12a2663a74783d94fe9a992b

Observation 8df5997f-2e04-438f-a8d2-6efbb4d657d1 · outbound

This paper cites Automatic die placement and flexible i/o assignment in 2.5 d ic design,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Automatic die placement and flexible i/o assignment in 2.5 d ic design,

Reference 33

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.865398Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.616397Z digest=sha256:a46b222e7ebe578ac689aa9b86fb6f543c7ecd6d80755a8c0b5b8ac272072ecd

Observation f77642e8-1627-4b57-82f5-f5c9f17d1743 · outbound

This paper cites Cluscross: a new topology for sili- con interposer-based network-on-chip,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Cluscross: a new topology for sili- con interposer-based network-on-chip,

Reference 34

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.845875Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.621055Z digest=sha256:4ead96b5f85253470ca4a088d0277be652fa91de1a0bb5fbe51bf646e7f260f5

Observation 5501b477-f654-43c1-8f78-e96d85d3d5d6 · outbound

This paper cites Simba: scaling deep-learning inference with chiplet-based architecture,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Simba: scaling deep-learning inference with chiplet-based architecture,

Reference 35

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.826805Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.625660Z digest=sha256:8d04deeae1cfe5afe13963c1218ccbb9fd71235ca9237169100e783c50c0914d

Observation b8151a15-2c65-4301-ba29-901d19670530 · outbound

This paper cites Direct bonded heterogeneous integration (dbhi) si bridge,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Direct bonded heterogeneous integration (dbhi) si bridge,

Reference 36

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.807752Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.630641Z digest=sha256:6b8f6684bc88000349a42cef9fc2cb89306bbdc09c0691c045226c88d62b276b

Observation fd5576a1-51c7-4c90-99ef-6384e8135300 · outbound

This paper cites Dojo: The microarchitecture of tesla’s exa-scale computer,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Dojo: The microarchitecture of tesla’s exa-scale computer,

Reference 37

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.789251Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.635115Z digest=sha256:f6ca3c0faa3fde5890905a815a66ed54ee034778ef0a21991cc867ce1492be88

Observation ddc01613-5fb3-4e71-883d-678485841485 · outbound

This paper cites Universal Chiplet Interconnect Express (UCIe) Specification,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies Universal Chiplet Interconnect Express (UCIe) Specification,

Reference 38

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.771536Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.639777Z digest=sha256:d0a6edc0c283363b91ba9c296fc44b7204c00e3241acf7d7e63881d2be7ddbb6

Observation 172c6a03-9809-42f9-a2d6-7dea99aaf0e0 · outbound

This paper cites IntAct: A 96-core processor with six chiplets 3D-stacked on an active interposer with distributed interconnects and integrated power management,.

PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies IntAct: A 96-core processor with six chiplets 3D-stacked on an active interposer with distributed interconnects and integrated power management,

Reference 39

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T15:19:46.754145Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

source=pdf_text observed=2026-08-09T15:19:46.644542Z digest=sha256:bff57383eb56ddb94ca2809479568e03e91d3ada83ea9c41af862c92e00b8674

Pith citing papers

No inbound Pith citation observations are available.