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Hierarchical decoding to reduce hardware requirements for quantum computing
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abstract
Extensive quantum error correction is necessary in order to scale quantum hardware to the regime of practical applications. As a result, a significant amount of decoding hardware is necessary to process the colossal amount of data required to constantly detect and correct errors occurring over the millions of physical qubits driving the computation. The implementation of a recent highly optimized version of Shor's algorithm to factor a 2,048-bits integer would require more 7 TBit/s of bandwidth for the sole purpose of quantum error correction and up to 20,000 decoding units. To reduce the decoding hardware requirements, we propose a fault-tolerant quantum computing architecture based on surface codes with a cheap hard-decision decoder, the lazy decoder, combined with a sophisticated decoding unit that takes care of complex error configurations. Our design drops the decoding hardware requirements by several orders of magnitude assuming that good enough qubits are provided. Given qubits and quantum gates with a physical error rate $p=10^{-4}$, the lazy decoder drops both the bandwidth requirements and the number of decoding units by a factor 50x. Provided very good qubits with error rate $p=10^{-5}$, we obtain a 1,500x reduction in bandwidth and decoding hardware thanks to the lazy decoder. Finally, the lazy decoder can be used as a decoder accelerator. Our simulations show a 10x speed-up of the Union-Find decoder and a 50x speed-up of the Minimum Weight Perfect Matching decoder.
Forward citations
Cited by 9 Pith papers
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Mitigating Classical Resource Costs in Quantum Error Correction via Generalized qLDPC Predecoding
An automated predecoder generator for arbitrary qLDPC codes cuts decoder utilization by up to 3963x and supports hardware scaling to tens or hundreds of thousands of logical qubits within power limits.
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Triage: An Adaptive Parallel Window Decoding Scheduler for Real-time Fault-Tolerant Quantum Computation
Triage is an adaptive parallel window decoding scheduler that reduces average logical error rates by 52.6% compared to standard temporal parallelism while keeping stalls low under scarce classical resources.
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Towards Ultra-High-Rate Quantum Error Correction with Reconfigurable Atom Arrays
A family of quantum LDPC codes with encoding rates exceeding 1/2 achieves logical error rates of 10^{-13} per round on atom arrays under 0.1% circuit noise using hierarchical decoding.
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Towards Ultra-High-Rate Quantum Error Correction with Reconfigurable Atom Arrays
New structural conditions on affine permutation matrices yield ultra-high-rate quantum LDPC codes (rate >1/2) with near-teraquop logical error rates under circuit-level noise on reconfigurable atom arrays.
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Pinball: A Cryogenic Predecoder for Surface Code Decoding Under Circuit-Level Noise
A cryogenic surface-code predecoder that adds spacetime-like and hook-error primitives to achieve near-MWPM logical error rates while cutting 4K-to-RT syndrome bandwidth by up to 3780x.
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Latency-Constrained Hardware-Aware Quantum Error Correction Co-Design with Adaptive Confidence-Gated Neural Decoding for the Rotated Surface Code
Confidence-gated neural decoding escalates only ~3–6% of rotated-surface-code syndromes to MWPM and raises end-to-end accuracy from 99.21% to 99.81% at d=7 under circuit-level depolarising noise.
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Latency-Constrained Hardware-Aware Quantum Error Correction Co-Design with Adaptive Confidence-Gated Neural Decoding for the Rotated Surface Code
A confidence-gated cascade decoder routes 3-6% of surface-code syndromes to exact MWPM refinement, improving logical accuracy from 99.21% to 99.81% at d=7 while keeping the fast neural path as the dominant cost center.
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LATTE: A Decoding Architecture for Quantum Computing with Temporal and Spatial Scalability
A hybrid FPGA-CPU streaming decoder cuts syndrome transmission by over 90% and keeps feedback latency roughly constant in long surface-code memory runs.
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Managing Classical Processing Requirements for Quantum Error Correction
A two-level decoder scheduling framework reduces classical processing requirements for quantum error correction by 10-40% on fault-tolerant benchmarks by managing bursty workloads as shared resources.
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