Paper Citation Record · LEDGER

AiEDA: Agentic AI Design Framework for Digital ASIC System Design

As of 14 August 2026, this Paper Citation Record lists 15 of 15 outbound references and 1 inbound Pith citation observation for arXiv:2412.09745.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2412.09745 v1

Coverage vector

measured 15 of 15 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-11T16:50:14.751120Z

measured 16 of 16 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-14T06:32:32.682623+00:00

measured 1 of 1 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-05-10T12:38:45.687975Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-05-11T11:46:20.456407Z

Reference resolution

15 of 15 outbound references displayed

verified exact0
verified fuzzy9
unresolved6
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 9b56091d-dd58-4dc8-af78-02b1f8e9c84b · outbound

This paper cites Introduction to large language models (llms),.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Introduction to large language models (llms),

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.193010Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation 92be4852-5d6e-45e5-84fb-0c5c560f407b · outbound

This paper cites Openroad: Toward a self-driving, open-source digital layout implementation tool chain,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Openroad: Toward a self-driving, open-source digital layout implementation tool chain,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.169794Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation f892e6b0-e2d6-4d4c-8b35-6e45c44fd05d · outbound

This paper cites Exploring agentic workflows: The power of ai-agent collaboration,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Exploring agentic workflows: The power of ai-agent collaboration,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.146885Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation 7cc3fe29-3034-44fb-a207-3309c763e574 · outbound

This paper cites Code Generation with AlphaCodium: From Prompt Engineering to Flow Engineering.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Code Generation with AlphaCodium: From Prompt Engineering to Flow Engineering

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.651241Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5b5d33bd-e95a-4893-b435-baed545bfa9c · outbound

This paper cites Dave: Deriving automatically verilog from english,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Dave: Deriving automatically verilog from english,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.127249Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation e5fdfb5a-038d-43aa-a0b3-69f5dad1e6d3 · outbound

This paper cites Verigen: A large language model for verilog code generation,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Verigen: A large language model for verilog code generation,

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.678121Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 658c4514-8baa-4bd5-91b8-e4ec9f3c2d3a · outbound

This paper cites ChipNeMo: Domain-Adapted LLMs for Chip Design.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design ChipNeMo: Domain-Adapted LLMs for Chip Design

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.685619Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6baacd1a-89df-4495-8481-37763c42c676 · outbound

This paper cites MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.694942Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d3dca82d-0830-4b36-95df-a38f3807728e · outbound

This paper cites Gpt4aigchip: Towards next-generation ai accelerator design automation via large language models,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Gpt4aigchip: Towards next-generation ai accelerator design automation via large language models,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.701648Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 513c2a44-7ed9-4065-999c-65f34399f050 · outbound

This paper cites AutoChip: Automating HDL Generation Using LLM Feedback.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design AutoChip: Automating HDL Generation Using LLM Feedback

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.707534Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c3ca7e95-4fe5-412d-9936-6850ac3ec4e5 · outbound

This paper cites Toward an open-source digital flow: First learnings from the openroad project,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Toward an open-source digital flow: First learnings from the openroad project,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.081077Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation 01f65ea9-7d8b-4fc8-85d5-73e510061939 · outbound

This paper cites 0.08mm2 128nw mfcc engine for ultra-low power, always-on smart sensing applications,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design 0.08mm2 128nw mfcc engine for ultra-low power, always-on smart sensing applications,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.051959Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation 2d71b2dd-4c07-4d41-a6ac-280e7427930f · outbound

This paper cites An efficient mfcc extraction method in speech recognition,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design An efficient mfcc extraction method in speech recognition,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:15.023568Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation 68b5f8f0-2cb9-459f-887c-0cbf36d7a97e · outbound

This paper cites Speech recognition based on convolutional neural networks and mfcc algorithm,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Speech recognition based on convolutional neural networks and mfcc algorithm,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:14.994390Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Observation fd56fa1d-b52f-4e87-8eda-18f129be1799 · outbound

This paper cites Langgraph: Build resilient language agents as graphs,.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design Langgraph: Build resilient language agents as graphs,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T16:50:14.965859Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.

Pith citing papers

Observation c625280d-8c81-4029-818b-262661235439 · inbound

TensorLift: Automatic Extraction of Tensor-Level ISA Semantics from Accelerator RTL via MLIR Semantic Lifting cites this paper.

TensorLift: Automatic Extraction of Tensor-Level ISA Semantics from Accelerator RTL via MLIR Semantic Lifting AiEDA: Agentic AI Design Framework for Digital ASIC System Design

Reference 40

Resolution: verified exact; arxiv_id, observed 2026-05-11T11:46:20.478358Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.