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Mapping Surface Code to Superconducting Quantum Processors

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arxiv 2111.13729 v1 pith:XJDE6AS4 submitted 2021-11-26 quant-ph cs.AR

Mapping Surface Code to Superconducting Quantum Processors

classification quant-ph cs.AR
keywords dataproposedqubitssyndromebridgequbitcodeextraction
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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In this paper, we formally describe the three challenges of mapping surface code on superconducting devices, and present a comprehensive synthesis framework to overcome these challenges. The proposed framework consists of three optimizations. First, we adopt a geometrical method to allocate data qubits which ensures the existence of shallow syndrome extraction circuit. The proposed data qubit layout optimization reduces the overhead of syndrome extraction and serves as a good initial point for following optimizations. Second, we only use bridge qubits enclosed by data qubits and reduce the number of bridge qubits by merging short path between data qubits. The proposed bridge qubit optimization reduces the probability of bridge qubit conflicts and further minimizes the syndrome extraction overhead. Third, we propose an efficient heuristic to schedule syndrome extractions. Based on the proposed data qubit allocation, we devise a good initial schedule of syndrome extractions and further refine this schedule to minimize the total time needed by a complete surface code error detection cycle. Our experiments on mainsstream superconducting quantum architectures have demonstrated the efficiency of the proposed framework.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Circuit-Level Noise Estimation via Shuttling in Plaquette Circuits

    quant-ph 2026-06 unverdicted novelty 4.0

    A method is developed for estimating QEC circuit-level noise from single-shot surface code plaquette experiments in FRESH and RECYCLE configurations, tested on IonQ and IBM hardware.