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AnalogCoder: Analog Circuit Design via Training-Free Code Generation
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Analog circuit design is a significant task in modern chip technology, focusing on the selection of component types, connectivity, and parameters to ensure proper circuit functionality. Despite advances made by Large Language Models (LLMs) in digital circuit design, the complexity and scarcity of data in analog circuitry pose significant challenges. To mitigate these issues, we introduce AnalogCoder, the first training-free LLM agent for designing analog circuits through Python code generation. Firstly, AnalogCoder incorporates a feedback-enhanced flow with tailored domain-specific prompts, enabling the automated and self-correcting design of analog circuits with a high success rate. Secondly, it proposes a circuit tool library to archive successful designs as reusable modular sub-circuits, simplifying composite circuit creation. Thirdly, extensive experiments on a benchmark designed to cover a wide range of analog circuit tasks show that AnalogCoder outperforms other LLM-based methods. It has successfully designed 20 circuits, 5 more than standard GPT-4o. We believe AnalogCoder can significantly improve the labor-intensive chip design process, enabling non-experts to design analog circuits efficiently.
Forward citations
Cited by 7 Pith papers
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SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows
An NDA-safe scrubbed boundary lets cloud LLMs optimize analog circuits in real Cadence flows; multi-model PVT benchmarks show successful closure on LC-VCO (7/11) and two-stage op-amp (4/11) tasks.
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DiffCkt: A Diffusion Model-Based Hybrid Neural Network Framework for Automatic Transistor-Level Generation of Analog Circuits
DiffCkt uses three diffusion networks to predict amplifier component counts, topology, and transistor sizes from performance specifications, and reports 2.21x to 8365x higher generation efficiency than prior analog EDA tools.
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White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
An LLM grounded in gm/Id transistor lookup tables sizes a two-stage op-amp to spec in five iterations, claimed about an order of magnitude faster than a senior engineer.
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MenTeR: A fully-automated Multi-agenT workflow for end-to-end RF/Analog Circuits Netlist Design
MenTeR is a multi-agent LLM system that claims to automate RF/analog circuit netlist design, achieving 84.2% Pass@1 on a 24-task benchmark, but its self-generated testbench validation is shown to sometimes certify inc...
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DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining
A self-supervised graph encoder for device-level circuits improves prediction of circuit similarity, delays, and op-amp performance across analog and digital designs.
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LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation
LaMAGIC2's SFCI representation cuts output token length from quadratic to linear and improves precision-sensitive generation of analog power converter topologies.
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