Paper Citation Record · LEDGER

Dissecting the NVidia Turing T4 GPU via Microbenchmarking

As of 6 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 8 inbound Pith citation observations for arXiv:1903.07486.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1903.07486 v1

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 8 of 8 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-06T06:34:29.942622+00:00

measured 8 of 8 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-06T17:31:26.853075Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: pith, observed 2026-07-03T14:08:21.715092Z

Reference resolution

0 of 0 outbound references displayed

verified exact0
verified fuzzy0
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation 22e3f90b-8e0d-4004-9cad-73c0ce5543ac · inbound

Dissecting the NVIDIA Blackwell Architecture with Microbenchmarks cites this paper.

Dissecting the NVIDIA Blackwell Architecture with Microbenchmarks Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 2019

Resolution: unresolved; no resolver link, observed 2026-08-06T17:31:26.853075Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ddd27145-4aa4-4b4e-bd39-8a1262afe34b · inbound

APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Acceleration cites this paper.

APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Acceleration Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 36

Resolution: unresolved; no resolver link, observed 2026-08-05T16:03:34.362212Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation de62ce88-8ba5-42b1-bfdd-7fdfe73d05e5 · inbound

Are Large Language Models Economically Viable for Industry Deployment? cites this paper.

Are Large Language Models Economically Viable for Industry Deployment? Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 14

Resolution: verified exact; arxiv_id, observed 2026-05-11T13:01:19.236481Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 0f223464-4502-452f-bbac-12f3e255a74f · inbound

Non-Monotonic Latency in Apple MPS Decoding: KV Cache Interactions and Execution Regimes cites this paper.

Non-Monotonic Latency in Apple MPS Decoding: KV Cache Interactions and Execution Regimes Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 23

Resolution: metadata mismatch; arxiv_id, observed 2026-05-12T07:46:42.731369Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation c6768e14-ded2-4fb7-a511-2d2dd99410de · inbound

Non-Monotonic Latency in Apple MPS Decoding: KV Cache Interactions and Execution Regimes cites this paper.

Non-Monotonic Latency in Apple MPS Decoding: KV Cache Interactions and Execution Regimes Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 23

Resolution: metadata mismatch; local_arxiv, observed 2026-05-15T05:09:46.094543Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 88a03382-9742-434e-88f5-5abbdf9d8184 · inbound

Rigel: Reverse-Engineering the Metal 4.1 Tensor Compute Path on the Apple M4 Max GPU cites this paper.

Rigel: Reverse-Engineering the Metal 4.1 Tensor Compute Path on the Apple M4 Max GPU Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 7

Resolution: verified exact; local_arxiv, observed 2026-07-03T14:08:21.716274Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 19e44833-e29a-485d-af8b-97c847fa9e8d · inbound

DGNA: Dissecting GPU NUMA Architecture through Microbenchmarking and Data Analysis cites this paper.

DGNA: Dissecting GPU NUMA Architecture through Microbenchmarking and Data Analysis Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-01T11:22:36.709673Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 00e52511-32b0-4d21-84dc-b89cbcbc2eff · inbound

Parallel Cascaded Recursive Filtering on Multi-Core CPUs and GPUs cites this paper.

Parallel Cascaded Recursive Filtering on Multi-Core CPUs and GPUs Dissecting the NVidia Turing T4 GPU via Microbenchmarking

Reference 32

Resolution: unresolved; no resolver link, observed 2026-07-30T13:23:04.710427Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.