Subsystem bivariate bicycle codes achieve high-rate BB logical qubits with local four-qubit gauge checks, yielding examples such as [[108,12,6]] that outperform surface-code alternatives.
Mixed citations
Improved QLDPC Surgery: Logical Measurements and Bridging Codes.arXiv preprint arXiv:2407.18393, 2024
Mixed citation behavior. Most common role is background (56%).
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quant-ph 20representative citing papers
A new in-situ scheme prepares logical magic states inside arbitrary CSS qLDPC codes using only syndrome-extraction ancillas, with simulations on the [[144,12,12]] BB code and [[225,9,4]] hypergraph-product code showing injection error rates around 10^{-3} or lower under depolarizing and asymmetric噪声
GB codes are expressed as cyclic submodules of R_ℓ² to derive necessary and sufficient conditions for block-separable automorphisms and fold-transversal gates, with the new MCR family demonstrated to generate the 2-qubit Clifford group for k=2 codes up to distance 13.
Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
Tricycle codes generalize bicycle codes to three homological dimensions, enabling constant-depth CCZ circuits and single-shot magic state generation with circuit-level thresholds above 0.5% and low error rates at block lengths of 50-100 qubits.
A new code surgery protocol measures t logically disjoint Pauli products on any LDPC code using O(t ω (log t + log³ω)) ancillas in O(d) time while preserving LDPC property and fault distance.
An algorithm converts topological data of 2D bulk stabilizer codes into 1D boundary subsystem codes via operator algebra and normal forms, enabling automatic generation of boundaries and defects demonstrated on toric, color, and other codes.
Full extractors for HGP codes are built to enable logical processing via PBC without compilation overhead, with sizes 50-80% of base codes and low error rates in simulations.
Concatenating quantum Reed-Solomon codes over the gross code via Galois qudits reaches teraquop regime at uniform 10^{-3} noise with reduced overhead.
A forced-gap post-selection strategy using repeated Relay-BP decoder runs improves logical error rates by over 4x on 72- and 144-qubit bivariate bicycle codes at fixed post-selection rate.
A modular atomic processor with 500,000 qubits factors 2048-bit RSA numbers in roughly the same time as a single large module when inter-module Bell-pair communication runs at 10^5 per second.
CAbLECAR provides a robotics-inspired shuttle scheduler that enables QLDPC codes on tileable spin-qubit hardware, yielding up to 86% faster schedules and orders-of-magnitude gains in encoding efficiency and logical error rates over surface codes.
Syn@fac optimization reduces estimated circuit failure probability by a factor of 9 on average across non-Clifford benchmarks for bivariate bicycle code modular FTQC architectures, with additional gains from transvection deferral and Clifford insertion.
A trapped-ion architecture based on LDPC codes and cat-state factories achieves 110 logical qubits and one million T gates per day using 2514 physical qubits, with estimates for Heisenberg model simulation on 100 sites in one month using 10000 qubits.
A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.
A new scheme for fault-tolerant quantum computation on qLDPC codes achieves constant qubit overhead and time overhead O(d^{1+o(1)}) for good codes, faster than prior code surgery methods for a<2.
Introduces a gauging-based method for fault-tolerant logical measurement achieving qubit overhead linear in operator weight up to polylog factors, adaptable to arbitrary codes.
A two-level decoder scheduling framework reduces classical processing requirements for quantum error correction by 10-40% on fault-tolerant benchmarks by managing bursty workloads as shared resources.
The paper identifies four key hurdles in the transition from NISQ to FASQ quantum computers and argues that targeting them will accelerate progress toward useful quantum advantage.
citing papers explorer
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Topological subsystem bivariate bicycle codes with four-qubit check operators
Subsystem bivariate bicycle codes achieve high-rate BB logical qubits with local four-qubit gauge checks, yielding examples such as [[108,12,6]] that outperform surface-code alternatives.
-
In-Situ Simultaneous Magic State Injection on Arbitrary CSS qLDPC Codes
A new in-situ scheme prepares logical magic states inside arbitrary CSS qLDPC codes using only syndrome-extraction ancillas, with simulations on the [[144,12,12]] BB code and [[225,9,4]] hypergraph-product code showing injection error rates around 10^{-3} or lower under depolarizing and asymmetric噪声
-
Generalized Bicycle Codes as Cyclic Submodules and their Automorphism Structure
GB codes are expressed as cyclic submodules of R_ℓ² to derive necessary and sufficient conditions for block-separable automorphisms and fold-transversal gates, with the new MCR family demonstrated to generate the 2-qubit Clifford group for k=2 codes up to distance 13.
-
The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes
Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
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Parallel Logical Measurements via Quantum Code Surgery
A new code surgery protocol measures t logically disjoint Pauli products on any LDPC code using O(t ω (log t + log³ω)) ancillas in O(d) time while preserving LDPC property and fault distance.
-
Operator algebra and algorithmic construction of boundaries and defects in (2+1)D topological Pauli stabilizer codes
An algorithm converts topological data of 2D bulk stabilizer codes into 1D boundary subsystem codes via operator algebra and normal forms, enabling automatic generation of boundaries and defects demonstrated on toric, color, and other codes.
-
Full Extractors for Logical Processing in Hypergraph Product Codes
Full extractors for HGP codes are built to enable logical processing via PBC without compilation overhead, with sizes 50-80% of base codes and low error rates in simulations.
-
Forced Gap Post-Selection for Quantum LDPC Codes and their Operations
A forced-gap post-selection strategy using repeated Relay-BP decoder runs improves logical error rates by over 4x on 72- and 144-qubit bivariate bicycle codes at fixed post-selection rate.
-
Factoring $2048$ bit RSA integers with a half-million-qubit modular atomic processor
A modular atomic processor with 500,000 qubits factors 2048-bit RSA numbers in roughly the same time as a single large module when inter-module Bell-pair communication runs at 10^5 per second.
-
CAbLECAR: efficiently scheduling QLDPC codes on a tileable spin qubit chip with shuttling
CAbLECAR provides a robotics-inspired shuttle scheduler that enables QLDPC codes on tileable spin-qubit hardware, yielding up to 86% faster schedules and orders-of-magnitude gains in encoding efficiency and logical error rates over surface codes.
-
Assessing System Capabilities and Bottlenecks of an Early Fault-Tolerant Bicycle Architecture
Syn@fac optimization reduces estimated circuit failure probability by a factor of 9 on average across non-Clifford benchmarks for bivariate bicycle code modular FTQC architectures, with additional gains from transvection deferral and Clifford insertion.
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Fault-Tolerant Quantum Computing with Trapped Ions: The Walking Cat Architecture
A trapped-ion architecture based on LDPC codes and cat-state factories achieves 110 logical qubits and one million T gates per day using 2514 physical qubits, with estimates for Heisenberg model simulation on 100 sites in one month using 10000 qubits.
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Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures
A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.
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Accelerating Fault-Tolerant Quantum Computation with Good qLDPC Codes
A new scheme for fault-tolerant quantum computation on qLDPC codes achieves constant qubit overhead and time overhead O(d^{1+o(1)}) for good codes, faster than prior code surgery methods for a<2.
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Low-overhead fault-tolerant quantum computation by gauging logical operators
Introduces a gauging-based method for fault-tolerant logical measurement achieving qubit overhead linear in operator weight up to polylog factors, adaptable to arbitrary codes.
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Managing Classical Processing Requirements for Quantum Error Correction
A two-level decoder scheduling framework reduces classical processing requirements for quantum error correction by 10-40% on fault-tolerant benchmarks by managing bursty workloads as shared resources.
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Mind the gaps: The fraught road to quantum advantage
The paper identifies four key hurdles in the transition from NISQ to FASQ quantum computers and argues that targeting them will accelerate progress toward useful quantum advantage.