Paper Citation Record · LEDGER

VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

As of 18 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 20 inbound Pith citation observations for arXiv:2408.08927.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2408.08927 v2

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 20 of 20 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 20 of 20 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-16T11:50:20.269954Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: pith, observed 2026-07-08T21:15:39.010325Z

Reference resolution

0 of 0 outbound references displayed

verified exact0
verified fuzzy0
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation 90b2374b-aa5d-4fcd-9e43-833bb684df84 · inbound

Does Few-Shot Learning Help LLM Performance in Code Synthesis? cites this paper.

Does Few-Shot Learning Help LLM Performance in Code Synthesis? VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-11T23:05:38.262478Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2e7e66c8-f512-404e-b924-4f7c070efafd · inbound

EDA-Aware RTL Generation with Large Language Models cites this paper.

EDA-Aware RTL Generation with Large Language Models VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-12T15:59:15.186427Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 61bdbb85-ca32-4276-98ea-665127f222cf · inbound

DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent cites this paper.

DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-12T10:49:36.066252Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b476b7d1-24aa-40a4-90df-1968ffaac446 · inbound

MAGE: A Multi-Agent Engine for Automated RTL Code Generation cites this paper.

MAGE: A Multi-Agent Engine for Automated RTL Code Generation VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-11T18:27:06.505269Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2ce78c31-8904-4095-9112-6c6646837950 · inbound

A Survey of Research in Large Language Models for Electronic Design Automation cites this paper.

A Survey of Research in Large Language Models for Electronic Design Automation VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-10T19:49:55.547693Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e1d3f5d1-3747-4176-9e33-779c4bf5215b · inbound

VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency cites this paper.

VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-10T16:58:06.890705Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 34571710-e292-4ac7-a1aa-d73c7006cce6 · inbound

ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Model cites this paper.

ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Model VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-16T11:50:20.269954Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation eb10efc6-382d-45b9-9d9a-64e472642abd · inbound

ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection cites this paper.

ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-07T14:11:56.124275Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c87a8029-60ca-4c64-8309-b67ce53715d1 · inbound

hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation cites this paper.

hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-07T10:45:07.049695Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d9e31526-002e-4763-8e01-bcc9f64d5a17 · inbound

Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems cites this paper.

Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-07T00:31:00.491880Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 59e82c01-446d-4df1-9992-4b23ef37607a · inbound

Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification cites this paper.

Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-15T19:59:24.418817Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b77d8ad3-8379-48bf-9045-881bfb7c215a · inbound

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design cites this paper.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-06T19:10:41.813419Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1b19a9a2-49fc-40db-a293-6770d9c746cf · inbound

VeriOpt: PPA-Aware High-Quality Verilog Generation via Multi-Role LLMs cites this paper.

VeriOpt: PPA-Aware High-Quality Verilog Generation via Multi-Role LLMs VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-06T15:51:34.474735Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation beb07df9-a0a9-413c-aaa0-debd7014c7b9 · inbound

AutoVeriFix: Automatically Correcting Errors and Enhancing Functional Correctness in LLM-Generated Verilog Code cites this paper.

AutoVeriFix: Automatically Correcting Errors and Enhancing Functional Correctness in LLM-Generated Verilog Code VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-04T20:43:13.889616Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f36aaa1b-a9a6-49cc-aa36-5fc62430de9b · inbound

QiMeng-PRepair: Precise Code Repair via Edit-Aware Reward Optimization cites this paper.

QiMeng-PRepair: Precise Code Repair via Edit-Aware Reward Optimization VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 3

Resolution: verified exact; arxiv_id, observed 2026-05-11T00:10:50.872757Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 0117f4e1-1b78-4f4b-a760-6f7d5cdad95e · inbound

VerilogCL: A Contrastive Learning Framework for Robust LLM-Based Verilog Generation cites this paper.

VerilogCL: A Contrastive Learning Framework for Robust LLM-Based Verilog Generation VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 15

Resolution: verified exact; arxiv_id, observed 2026-05-11T12:11:06.988866Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 27ae1e51-51f3-4e91-9437-786c3602cadb · inbound

RTL-BenchMT: Dynamic Maintenance of RTL Generation Benchmark Through Agent-Assisted Analysis and Revision cites this paper.

RTL-BenchMT: Dynamic Maintenance of RTL Generation Benchmark Through Agent-Assisted Analysis and Revision VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 5

Resolution: verified exact; arxiv_id, observed 2026-05-19T14:42:37.333607Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 5ce2ef4f-c898-4db5-97ee-a47e55fff009 · inbound

RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models cites this paper.

RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 12

Resolution: verified exact; arxiv_id, observed 2026-07-03T00:47:30.477407Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation afa0a7f6-7a63-4d89-b878-2fc2dd477b12 · inbound

Agentic Hardware Design as Repository-Level Code Evolution cites this paper.

Agentic Hardware Design as Repository-Level Code Evolution VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 16

Resolution: metadata mismatch; arxiv_id, observed 2026-07-01T18:45:58.312954Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 0671b520-98e2-40dc-b0a8-6097627915ec · inbound

PCBWorld: A Benchmark Environment for Engine-Grounded PCB Design Automation cites this paper.

PCBWorld: A Benchmark Environment for Engine-Grounded PCB Design Automation VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 26

Resolution: verified exact; local_arxiv, observed 2026-07-08T21:15:39.011721Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.